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_______________________________________________________________ maxim integrated products 1 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxims website at www.maxim-ic.com. MAX17135 multi-output dc-dc power supply with vcom amplifier and temperature sensor for e-paper applications 19-5881; rev 1; 12/11 ordering information general description the MAX17135 is a complete power-management ic for e-paper displays that provides source- and gate-driver power supplies, a high-speed vcom amplifier, and a temperature sensor. the source-driver power supplies consist of a boost converter and an inverting buck-boost converter that generates +15v (up to +17v) and -15v (up to -17v), respectively. both source-driver power supplies can deliver up to 200ma. the positive source-driver supply regulation voltage (v pos ) can be set either by using an i 2 c interface or by connecting an external resistor- divider. the negative source-driver supply voltage (v neg ) is always tightly regulated to -v pos within q 50mv. the gate-driver power supplies consist of regulated charge pumps that generate +22v (up to +40v) and -20v (up to -40v) and can deliver up to 20ma each. the ic features a vcom amplifier output whose output voltage is controlled by an internal 8-bit digital-to-analog converter (dac). the dac is programmable through an i 2 c interface and allows small-voltage-step sizes per dac step. the ic includes a temperature sensor that provides the ability to read the internal ic temperature and an external panel temperature with the use of an external temperature-sensing diode. temperature output data is supplied through i 2 c. the device is available in a space-saving, 32-pin tqfn package and is specified over the -40 n c to +85 n c extended temperature range. applications e-book readers features s four regulated output voltages for source- and gate-driver power supplies s v pos + v neg = 50mv tracking accuracy s measures internal and remote diode temperature sensors s true shutdown on all outputs s 2.7v to 5.5v in supply voltage range s controlled inrush current during soft-start s i 2 c serial interface for temperature read, power output enable, pos voltage regulation set-point adjustment, power-up/power-down sequencing adjustment, and fault monitoring + denotes a lead(pb)-free/rohs-compliant package. *ep = exposed pad. simplified operating circuit evaluation kit available pgvdd dp fbpg dgvdd dgvee dn pgvee fbng ref cen en pok flt v dd gnd scl sda ep dxn dxp vcom lxn inn hvinn neg pos hvinp fbp pgnd lxp in 2.7v to 5.5v input v pos v neg 2.7v to 5.5v input v vcom controller v gvee v gvdd i 2 c bus MAX17135 part temp range pin-package MAX17135etj+ -40 n c to +85 n c 32 tqfn-ep*
MAX17135 multi-output dc-dc power supply with vcom amplifier and temperature sensor for e-paper applications 2 stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. in, en, cen, vdd, sda, scl, inn, flt to gnd ... -0.3v to +6v fbpg, fbng, fbp, dxp, dxn, ref to gnd .............................................. -0.3v to (v in + 0.3v) pok to gnd ............................................ -0.3v to (v vdd + 0.3v) lxp to pgnd ......................................................... -0.3v to +20v pgvdd, pos to gnd ........................... -0.3v to (v hvinp + 0.3v) lxn to pgnd .......................... (v hvinn - 0.3v) to (v inn + 0.3v) pgvee, neg to gnd .......................... (v hvinn - 0.3v) to +0.3v dp to pgnd ......................................... -0.3v to (v hvinp + 0.3v) dn to pgnd ........................................ (v hvinn - 0.3v) to +0.3v dgvdd to gnd ..................................................... -0.3v to +42v hvinn to pgnd .................................................... -20v to +0.3v dgvee to gnd ..................................................... -42v to +0.3v dgvdd to hvinn ............................................................... +60v vcom to gnd .................................... ( v hvinn - 0.3v) to +0.3v pgnd to gnd ..................................................... -0.3v to +0.3v lxp, lxn, inn, pgnd rms current rating ....................... 1.6a continuous power dissipation (multilayer board) tqfn (derate 24.9mw/ n c above t a = +70 n c) ........... 1990mw operating temperature range .......................... -40 n c to +85 n c junction temperature ..................................................... +150 n c storage temperature range ............................ -65 n c to +150 n c lead temperature (soldering, 10s) ................................ +300 n c soldering temperature (reflow) ...................................... +260 n c electrical characteristics (v in = 3.6v, typical operating circuit of figure 2, v hvinp = 15v, v neg = -15v, t a = -40c to +85c , unless otherwise noted. typical values are at t a = +25 n c.) absolute maximum ratings parameter symbol conditions min typ max units input supplies and reference in voltage range 2.7 5.5 v in uvlo threshold v in rising 2.45 2.55 2.65 v in uvlo hysteresis 100 mv in quiescent current en = gnd and the shutdown bit in the configuration register = 1 4 10 f a en = gnd and the shutdown bit in the configuration register = 0 0.8 1.5 ma v en = 3.6v, no switching, shutdown bit in the configuration register = 0 2 3.5 v en = 3.6v, switching, shutdown bit in the configuration register = 0 3 v dd input voltage 1.6 5.5 v v dd uvlo threshold v dd rising, hysteresis = 150mv 1.2 1.5 v v dd quiescent current en = gnd 4 10 f a normal mode 4 10 ref output voltage no load 1.238 1.250 1.262 v ref uvlo threshold ref rising 1.0 1.2 v ref uvlo hysteresis 100 mv ref load regulation 0 < i ref < 100 f a 10 mv ref line regulation 2.7v < v in < 5.5v 2 mv
MAX17135 multi-output dc-dc power supply with vcom amplifier and temperature sensor for e-paper applications 3 electrical characteristics (continued) (v in = 3.6v, typical operating circuit of figure 2, v hvinp = 15v, v neg = -15v, t a = -40c to +85c , unless otherwise noted. typical values are at t a = +25 n c.) parameter symbol conditions min typ max units step-up regulator output voltage range v hvinp v in 17 v v pos fbp = gnd 5 17 operating frequency 850 1000 1150 khz oscillator maximum duty cycle 91 95 98 % output voltage resolution fbp = gnd 4 bits pos output regulation error fbp = gnd, v inn = 2.7v to 5.5v, 1ma < i pos < 200ma -2 +2 % fbp regulation voltage 1.238 1.250 1.262 v fbp load regulation 1ma < i pos < 200ma -1 % fbp line regulation v in = 2.7v to 5.5v -0.08 %/v fbp input bias current v fbp = 1.25v, t a = +25 n c 50 125 200 na fbp internal divider enable threshold fbp rising, hysteresis = 10mv 25 50 mv lxp on-resistance i lxp = 0.2a 250 500 m i lxp leakage current en = gnd, v lxp = 18v, t a = +25 n c 20 f a lxp current limit duty cycle = 80 % 1.5 1.8 2.1 a soft-start period 5 ms inverting regulator inn input voltage range 2.7 5.5 v inn quiescent current en = gnd 10 f a no switching 10 switching 3 ma output voltage range v hvinn -17 v operating frequency 850 1000 1150 khz oscillator maximum duty cycle 91 95 98 % v pos + v neg regulation voltage v inn = 2.7v to 5.5v, 1ma < i neg < 200ma, i pos = no load, v neg r -15v, t a = 0 n c to +85 n c -50 +50 mv v pos + v neg regulation voltage v inn = 2.7v to 5.5v, 1ma < i neg < 200ma, i pos = no load -70 +70 mv lxn on-resistance inn to lxn, i lxn = 0.2a 250 500 m i lxn leakage current v lxn = v hvinn = -18v, t a = +25 n c 20 f a lxn current limit duty cycle = 85 % 1.8 2.1 2.4 a soft-start period 5 ms positive charge-pump regulator pgvdd operating voltage range v pgvdd 7 v hvinp v hvinp-dp current limit 150 ma oscillator frequency 400 500 600 khz
MAX17135 multi-output dc-dc power supply with vcom amplifier and temperature sensor for e-paper applications 4 electrical characteristics (continued) (v in = 3.6v, typical operating circuit of figure 2, v hvinp = 15v, v neg = -15v, t a = -40c to +85c , unless otherwise noted. typical values are at t a = +25 n c.) parameter symbol conditions min typ max units fbpg regulation voltage 1.238 1.250 1.262 v fbpg line regulation v hvinp = 11v to 16v 0.05 %/v fbpg load regulation 0ma < i gvdd < 100ma 0.04 % fbpg input bias current v fbpg = 1.25v, t a = +25 n c -50 +50 na dp on-resistance high i dp = 100ma 3 6 i dp on-resistance low i dp = -100ma 1.5 3 i soft-start period 10 ms negative charge-pump regulator pgvee operating voltage range v pgvee v hvinn -7 v hvinn-dn current limit 150 ma oscillator frequency 400 500 600 khz fbng regulation voltage -12 0 +12 mv fbng line regulation v neg = -11v to -16v 0.05 %/v fbng load regulation 0ma < i gvee < 100ma -0.03 % fbng input bias current v fbng = 0v, t a = +25 n c -50 +50 na dn on-resistance high i dn = 100ma 3 6 i dn on-resistance low i dn = -100ma 1.5 3 i soft-start period 10 ms vcom input supply range v hvinn -5 v hvinp shutdown current v en = gnd and the shutdown bit in the configuration register = 1, v hvinp = 3.6v 10 30 a hvinp quiescent current v hvinp = 15v, v en = 3.6v, configuration register = 0 0.8 ma hvinn quiescent current v hvinn = -15v, v en = 3.6v, configuration register = 0 2.0 ma vcom voltage high i vcom = 5ma -25 -50 mv vcom voltage low i vcom = -5ma v hvinn + 50 v hvinn + 25 mv vcom load regulation 0ma < i vcom < 30ma, sourcing, dvr register = 7fh -1.6 -0.6 % 0ma < i vcom < 30ma, sinking, dvr register = 7fh 0.3 1.3 vcom output current sourcing 70 ma sinking 70 vcom high impedance leakage cen = gnd, t a = +25 n c 1 f a
MAX17135 multi-output dc-dc power supply with vcom amplifier and temperature sensor for e-paper applications 5 electrical characteristics (continued) (v in = 3.6v, typical operating circuit of figure 2, v hvinp = 15v, v neg = -15v, t a = -40c to +85c , unless otherwise noted. typical values are at t a = +25 n c.) parameter symbol conditions min typ max units sequence switches pos output range v pos tracks hvinp v in 17 v pos on-resistance (hvinp - pos), i pos = 100ma 0.9 1.3 i pos charge current limit 250 ma pos discharge resistance 200 340 600 i pos soft-start charge time 10 ms neg output range v neg tracks hvinn -17 v neg on-resistance (hvinn - neg), i neg = 100ma 0.6 1 i neg charge current limit 250 ma neg discharge resistance 200 340 600 i neg soft-start charge time 10 ms pgvdd on-resistance (hvinp - pgvdd), i pgvdd = 30ma 4 7 i pgvee on-resistance (hvinn - pgvee), i pgvee = 30ma 1.5 3 i dgvdd and dgvee dgvdd input voltage range 7 40 v dgvdd discharge resistance 800 1200 1600 i dgvee input voltage range -40 -7 v dvgee discharge resistance 800 1200 1600 i vcom discharge resistance 100 170 300 i fault protection hvinp fault threshold v hvinp falling 75 80 85 % fbp fault threshold v fbp falling 0.95 1.00 1.05 v fbpg fault threshold v fbpg falling 0.95 1.00 1.05 v hvinn fault threshold v hvinn rising -v hvinp x 0.85 -v hvinp x 0.8 -v hvinp x 0.75 v fbng fault threshold v fbng rising 200 250 300 mv feedback fault timer 50 ms thermal shutdown hysteresis = 15 n c 160 n c temperature sensor temperature resolution monotonicity guaranteed 8 bits lsb 0.5 n c external diode temperature error t a = 0 n c to +85 n c -4 +4 n c t a = -40 n c to +125 n c -8 +8 external conversion time 60 ms conversion rate register 0fh = 100b 1 conv/s register 0fh = 111b 8 diode source current v dxp = 1.5v - high level 90 100 110 f a v dxp = 1.5v - low level 9.0 10 11.0 diode source current ratio v dxp = 1.5v 9.5 10 10.5 a/a
MAX17135 multi-output dc-dc power supply with vcom amplifier and temperature sensor for e-paper applications 6 electrical characteristics (continued) (v in = 3.6v, typical operating circuit of figure 2, v hvinp = 15v, v neg = -15v, t a = -40c to +85c , unless otherwise noted. typical values are at t a = +25 n c.) parameter symbol conditions min typ max units dxn source voltage 0.4 0.7 0.85 v diode short-circuit threshold v dxn = 0.7v, v dxp - v dxn 20 65 110 mv diode open-circuit threshold v dxn = 0.7v, v dxp - v dxn 1.6 1.9 2.2 v programmable vcom calibrator vcom-dac voltage resolution 8 bits vcom-dac differential nonlinearity monotonic over temperature -1 +1 lsb vcom-dac accuracy vcom_set = 0x7f. t a = 0 n c to +85 n c -1.5 +1.5 lsb vcom-dac accuracy vcom_set = 0x7f. t a = -40 n c to +85 n c -2.5 +2.5 lsb vcom-dac accuracy other setting -4 +4 lsb memory program voltage hvinp rising, hysteresis = 250mv 6.95 7.1 7.25 v pos settling time to q 0.5 lsb error band 20 f s memory write cycles 30 times memory write time 110 ms control logic input low voltage en, cen 0.3 x v dd v input high voltage en, cen 0.7 x v dd v input impedance en, cen = 3.6v 1 m i pok logic-high output voltage i pok = 0.5ma v dd - 0.4 v pok logic-low output voltage i pok = -0.5ma 0.4 v flt leakage current v/ flt = 5.5v, t a = +25 n c 1 f a flt output low voltage i/ flt = 6ma 0.4 v i 2 c interface input capacitance sda, scl 5 pf input low voltage v il sda, scl 0.3 x v dd v input high voltage v ih sda, scl 0.7 x v dd v sda sink current v sda = 0.4v 6 ma scl frequency f scl dc 400 khz scl high time t high 600 ns scl low time t low 1300 ns
MAX17135 multi-output dc-dc power supply with vcom amplifier and temperature sensor for e-paper applications 7 note 1: holding the sda line low for a time greater than t timeout causes the device to reset sda to the idle state of the serial bus communication (sda set high). note 2: guaranteed by design, not production tested. note 3: all devices are 100% tested at t a = +25c. limits over temperature are guaranteed by design. electrical characteristics (continued) (v in = 3.6v, typical operating circuit of figure 2, v hvinp = 15v, v neg = -15v, t a = -40c to +85c , unless otherwise noted. typical values are at t a = +25 n c.) figure 1. timing definitions used in the electrical characteristics scl sda v ih v il t f t hd;sta t r t low t high t hd;dat t su;dat t su;sta t su;sto t buf parameter symbol conditions min typ max units sda, scl rise time t r c bus = total bus line capacitance (pf) (note 2) 20 + 10 x c bus 300 ns sda, scl fall time t f c bus = total bus line capacitance (pf) (note 2) 20 + 10 x c bus 300 ns start hold time t hd;sta 10 % of sda to 90 % of scl 600 ns start setup time t su;sta 600 ns data input hold time t hd;dat 0 ns data input setup time t su;dat 100 ns stop setup time t su;sto 600 ns bus free time t buf 1300 ns input spike suppression sda, scl (note 2) 250 ns sda reset low time t timeout (notes 1, 2) 60 ms
MAX17135 8 multi-output dc-dc power supply with vcom amplifier and temperature sensor for e-paper applications typical operating characteristics (t a = +25c, unless otherwise noted.) total input supply standby current vs. in supply voltage MAX17135 toc01 v in (v) i vin (ua) 5.5 5.0 2.5 3.0 3.5 4.0 4.5 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 2.0 2.0 6.0 v dd = 3.3v, temp sensor shutdown = 1 pos load regulation MAX17135 toc02 load current (ma) output error (%) 150 100 50 -0.40 -0.30 -0.20 -0.10 0 -0.50 0 200 v in = 3.6v v pos = 15v fbp = gnd pos line regulation MAX17135 toc03 input voltage (v) output error (%) 4.8 4.1 3.4 -0.15 -0.10 -0.05 0 -0.20 2.7 5.5 v pos = 15v i pos = 100ma fbp = gnd pos load-transient response (50ma to 150ma) MAX17135 toc04 i pos 100ma/div v pos (ac-coupled) 100mv/div 0ma 0mv 0a i lx1 1a/div v in = 3.6v v pos = 15v fbp = gnd c pos-gnd = 3 x 4.7f 100s/div v pos + v neg line regulation MAX17135 toc06 v in (v) output error (mv) 5.5 5.0 3.0 3.5 4.0 4.5 -13.0 -11.0 -9.0 -7.0 -5.0 -3.0 -1.0 1.0 -15.0 2.5 6.0 v pos = 15v v neg = -15v i pos = i neg = 0ma v pos + v neg load regulation MAX17135 toc05 load current (ma) output error (mv) 175 150 125 100 75 50 25 -15 -10 -5 0 -20 0 200 v pos = 15v v neg = -15v v in = 3.6v fbp = gnd neg load-transient response (50ma to 150ma) MAX17135 toc07 i neg 100ma/div v neg 100mv/div (ac-coupled) 0ma 0mv 0a i lx2 1a/div v in = 3.6v v neg = -v pos = -15v c neg-gnd = 3 x 4.7f 100s/div
MAX17135 9 multi-output dc-dc power supply with vcom amplifier and temperature sensor for e-paper applications typical operating characteristics (continued) (t a = +25c, unless otherwise noted.) power-up sequence of all supply outputs MAX17135 toc08 0v 0v 0v 0v 0v 20ms/div power-down sequence of all supply outputs MAX17135 toc09 0v 0v 0v 0v 0v 20ms/div gvdd 20v/div pos 10v/div neg 10v/div gvee 20v/div en 2v/div gvdd load regulation MAX17135 toc10 load current (ma) output error (%) 10 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0 1 100 v in = 3.6v v hvinp = 15v v gvdd = 22v gvee load regulation MAX17135 toc11 load current (ma) output error (%) 10 -0.20 -0.15 -0.10 -0.05 0 -0.25 1 100 v in = 3.6v v hvinn = -15v v gvee = -20v neg efficiency vs. load current MAX17135 toc13 load current (ma) efficiency (%) 150 100 50 60 70 80 90 100 40 50 0 200 v in = 3.6v v neg = 15v vcom load regulation MAX17135 toc12 load current (ma) output error (%) 5 15 20 10 25 -0.35 -0.30 -0.25 -0.20 -0.15 -0.10 -0.05 0 -0.40 03 0 v in = 3.6v v hvinp = 15v v com at no load = -1.77v pos efficiency vs. load current MAX17135 toc14 load current (ma) efficiency (%) 150 100 50 60 70 80 90 100 50 0 200 v in = 3.6v v pos = 15v fbp = gnd
MAX17135 10 multi-output dc-dc power supply with vcom amplifier and temperature sensor for e-paper applications pin configuration pin description MAX17135 tqfn top view 29 30 28 27 12 11 13 pgvdd dgvdd pok dgvee ref 14 dp pos gnd n.c. neg n.c. cen 12 hvinp 45 67 23 24 22 20 19 18 lxp pgnd dxp sda scl v dd fbpg vcom 3 21 31 10 fbp dn 32 9 in pgvee ep + inn 26 15 dxn lxn 25 16 en fbng flt 8 17 hvinn pin name function 1 dp regulated charge-pump driver for gvdd. connect to flying capacitor. 2 pgvdd supplies the hvinp voltage for the positive charge pump. connect as shown in figure 2. 3 fbpg feedback input for gvdd 4 dgvdd gvdd discharge. connect the output of the positive charge pump to dgvdd as shown in figure 2. 5 pok power-ok. driven high when the outputs of the gate- and source-driver power supplies are all in regulation. 6 dgvee gvee discharge. connect the output of the negative charge pump to dgvee as shown in figure 2. 7 ref voltage reference. bypass to gnd with a minimum 0.1 f f ceramic capacitor. 8 fbng feedback input for gvee 9 pgvee supplies the hvinn voltage to the negative charge pump for the gvee output. connect as shown in figure 2. 10 dn regulated charge-pump driver for gvee. connect to flying capacitor. 11 v dd logic supply input for the i 2 c. bypass to gnd through a minimum 0.1 f f capacitor. 12 scl i 2 c serial clock input 13 sda i 2 c serial data input/output 14 dxp external temperature-sensing diode anode connection. bypass dxp to dxn with a 2200pf ceramic capacitor.
MAX17135 multi-output dc-dc power supply with vcom amplifier and temperature sensor for e-paper applications 11 pin description (continued) pin name function 15 dxn external temperature-sensing diode cathode connection 16 en enable pin. logic-high initiates power-up sequencing. logic-low initiates power-down sequencing. 17 flt fault indicator. open-drain output goes low during a fault condition. 18 cen vcom enable. logic-high enables vcom output. logic-low causes the load on the vcom output to be discharged. 19, 20 n.c. no connection 21 gnd analog gnd 22 vcom vcom output 23 pos positive source-driver output voltage 24 neg negative source-driver output voltage 25 hvinn input power for the neg voltage rail. connect the output of the inverting converter to this pin. 26 lxn dc-dc inverting converter inductor/diode connection 27 inn inverting converter power input. 2.7v to 5.5v. bypass to pgnd with a minimum 10 f f ceramic capacitor. 28 hvinp input power for the pos voltage rail. connect the output of the step-up converter to this pin. 29 lxp step-up converter inductor/diode connection 30 pgnd power ground 31 fbp feedback pin for hvinp output. connect fbp to gnd to set the hvinp regulation voltage to +15v. with fbp connected to ground, v hvinp can be changed through i 2 c after power-up by changing the value stored in the hvinp register. alternatively, connect an external resistor-divider midpoint to the fbp pin to set the hvinp regulation voltage. 32 in power input. bypass to gnd through a minimum 1 f f capacitor. ep exposed pad. connect exposed pad to ground.
MAX17135 multi-output dc-dc power supply with vcom amplifier and temperature sensor for e-paper applications 12 figure 2. typical operating circuit pgvdd d4 d3 c13 0.1f 25v c11 1f 25v r2 806ki r3 49.9ki r6 10i r7 0.5i c10 0.1f r1 100ki c9 0.1f c8 2200pf q1 c16 1f 25v c15 0.1f 25v c14 1f 25v r4 332ki r5 20ki dp fbpg dgvdd dgvee dn pgvee fbng ref cen en pok flt v dd gnd scl sda ep dxn dxp vcom lxn inn hvinn neg pos hvinp fbp pgnd lxp in 2.7v to 5.5v input v pos = +15v 200ma c3 4.7f 25v d1 l1 4.7f c2 10f 6.3v c1 1f 10v v neg = -v pos 200ma 2.7v to 5.5v input c5 4.7f 25v c4 4.7f 25v c18 4.7f 25v c19 4.7f 25v c17 4.7f 25v vcom = -0.5v to -3.05v, 70ma (adjustable in 10mv steps) l2 4.7h c7 4.7f 25v c20 4.7f 25v d2 c6 10f 6.3v controller v gvdd = +22v 20ma v gvee = -20v 20ma c12 4.7f 50v i 2 c bus MAX17135
MAX17135 multi-output dc-dc power supply with vcom amplifier and temperature sensor for e-paper applications 13 figure 3. functional diagram pgvdd dp fbpg dgvdd dgvee regulated charge pump dn pgvee fbng 1.25v ref cen en pok flt v dd scl sda gnd dxp dxn temp adc internal diode temperature sensor vcom register and dac non- volatile memory i 2 c interface enable control and fault logic power rail output control 1mhz pwm inv neg soft- start pos soft- start 1mhz pwm bst regulated charge pump pgnd lxp in 2.7v to 5.5v input 2.7v to 5.5v input fbp hvinp pos neg hvnn inn lxn vcom to vcom backplane v pos v neg controller i 2 c bus v gvee v gvdd MAX17135
MAX17135 multi-output dc-dc power supply with vcom amplifier and temperature sensor for e-paper applications 14 typical operating circuit the ics typical operating circuit (figure 2) generates q 15v source-driver supplies and +22v and -20v gate- driver supplies for e-paper displays. the input voltage range for the ic is from 2.7v to 5.5v. figure 3 shows the functional diagram. table 1 lists recommended compo - nents and table 2 lists contact information for compo - nent suppliers. detailed description source-driver power supplies the source-driver power supplies consist of a boost converter and an inverting buck-boost converter that generate +15v (+17v max) and -15v (-17v max), respectively, and can deliver up to 200ma. the positive source-driver power supplys regulation voltage (v pos ) can be set using the external resistor-divider network shown in figure 2, or can be programmed through the i 2 c interface connecting fbp to gnd before power-up. the negative source-driver supply voltage (v neg ) is automatically tightly regulated to -v pos within q 50mv. v neg cannot be adjusted independently of v pos . gate-driver power supplies the positive gate-driver power supply (gvdd) generates +22v (+40v max) and the negative gate-driver power supply (gvee) generates -20v (-40v max). both supplies can supply up to 20ma current. the gvdd and gvee regulation voltages are both set by using the external resistor-divider networks shown in figure 2. vcom amplifier the ic features a negative output vcom amplifier whose voltage is programmed through an i 2 c interface. an internal 8-bit digital-to-analog converter (dac) allows for a wide vcom output range of -0.5v to -3.05v and a 10mv change per dac step. the user can store the dac setting in nonvolatile memory. on power-up, the nonvola - tile memory sets the dac to the last stored setting. temperature sensor the ic includes a temperature sensor that reads the internal ic temperature and the external panel tem - perature with the use of an external temperature-sensing diode. temperature output data is supplied through i 2 c. an analog-to-digital converter (adc) converts the tem - perature data to 9 bits, twos-complement format and stores the conversion results in separate temperature registers. fault protection the ic has robust fault and overload protection. if any of the gvee, neg, pos, or gvdd outputs fall more than 80% (typ) below their intended regulation voltage for more than 50ms (typ), or if a short-circuit condition occurs on any output for any duration, then all outputs latch off and flt is asserted low. the fault condition is set in the fault register, which can be read through the i 2 c interface. true shutdown the ic completely disconnects the loads from the input when in shutdown mode. in most boost converters, the external rectifying diode and inductor form a dc current path from the battery to the output. this can drain the battery even in shutdown if a load was connected at the boost-converter output. the device has an internal switch at pos. when this switch turns off during shut - down, there is no dc path from the input to pos. table 1. component list table 2. component suppliers designation description c2, c6 10 f f q 10%, 6.3v x7r ceramic capacitors (0805) tdk c2012x7r0j106k c3, c4, c5, c7, c17Cc20 4.7 f f q 10%, 25v x7r ceramic capacitors (1206) murata grm31cr71e475ka88l d1, d2 30v, 1a single schottky diodes (sod123) on semiconductor mbr130t1 d3, d4 dual small-signal diodes (sot23) fairchild mmbd4148se l1, l2 4.7 f h, 1.5a, 45m i inductors toko a915ay-4r7m q1 40v npn transistor (sot23) fairchild mmbt3904 supplier website fairchild semiconductor www.fairchildsemi.com murata electronics north america, inc. www.murata-northamerica.com on semiconductor www.onsemi.com tdk corp. www.component.tdk.com toko america, inc. www.tokoam.com
MAX17135 multi-output dc-dc power supply with vcom amplifier and temperature sensor for e-paper applications 15 output control the ics source-driver and gate-driver outputs (gvee, neg, pos, and gvdd) and vcom amplifier output can be controlled by driving the ics en and cen pins, respectively. alternatively, the en and cen pins can be left unconnected or connected to gnd such that their corresponding functions can be controlled by toggling the en and cen bits in the enable register. all outputs are brought up with soft-start control to limit the inrush current. power-on/power-off sequencing and timing the ic allows for flexible power-up/power-down sequenc - ing and timing of the source-driver and gate-driver power supplies (gvee, neg, pos, and gvdd). toggling the en pin from low to high or setting the en bit in the enable register to 1 initiates an adjustable preset power- up sequence. toggling the en pin from high to low or setting the en bit in the enable register to 0 initiates an adjustable preset power-down sequence. the power- up/power-down sequence and timing between rails are determined by the users values programmed into the timing registers through i 2 c. the desired sequence and timing between rails contained in the timing registers can also be stored in the nonvolatile memory, such that desired timing information is loaded into the timing reg - isters at power-up. i 2 c interface the device supports an i 2 c-compatible, 2-wire digital interface. sda is the bidirectional data line and scl is the clock line of the 2-wire interface corresponding, respectively, to the sda and scl lines of the i 2 c bus. write to a register by writing the device address byte, a data pointer byte, and a data byte. read from the ic in one of two ways: if the location latched in the pointer register is set from the previous read, the new read con - sists of a device address byte, followed by retrieving the corresponding number of data bytes. if the pointer reg - ister needs to be set to a new address, perform a read operation by writing the device address byte, pointer byte, repeat start, and the device address byte again with the read bit. an inadvertent 8-bit read from a 16-bit register, with the d7 bit low, can cause the device to stop in a state where the sda line is held low. ordinarily, this would prevent any further bus communication until the master sends nine additional clock cycles or sda goes high. at that time, a stop condition resets the device. if the additional clock cycles are not generated by the master, the ic bus resets and unlocks after the bus time - out period has elapsed. the device uses the read and write protocols shown in figure 4. figure 4. read/write protocols byte read from preset pointer loca tion msb start slave ack stop d7 d6 d5 d4 d3 d2 d1 d0 lsb msb lsb slave address data byte 00 1 000 1 1 pointer set followed by immedia te byte read slave address pointer byte stop d7 d6 d5 d4 d3 d2 d1 d0 msb lsb slave address data byte msb start slave ack slave ack 000p 4 p3 p2 p1 p0 lsb msb lsb 00 1 000 0 1 slave ack lsb 001 000 1 1 repeat start word read from preset pointer loca tion slave address most significant data byte least significant data byte msb lsb msb lsb start slave ack d7 d6 d5 d4 d3 d2 d1 d0 001000 1 1 msb master ack stop lsb d7 d6 d5 d4 d3 d2 d1 d0 pointer set followed by immedia te word read slave address pointer byte slave address msb start master ack 00 0p 4 p3 p2 p1 p0 lsb msb lsb 00 1 0 00 0 1 msb slave ack lsb 001 0 00 1 1 d7 d6 d5 d4 d3 d2 d1 d0 msb lsb most significant data byte stop d7 d6 d5 d4 d3 d2 d1 d0 msb lsb least significant data byte slave ack repeat start master ack byte write slave address pointer byte data byte msb lsb msb lsb start slave ack 000p 4p 3p 2p 1p 0 001000 0 1 msb slave ack lsb d6 d5 d4 d3 d2 d1 d0 d7 stop slave ack
MAX17135 multi-output dc-dc power supply with vcom amplifier and temperature sensor for e-paper applications 16 i 2 c address the ic is a slave-only device and responds to the 7-bit address 90h. the read and write commands can be distin - guished by adding 1 more bit (r/w bit) to the end of the 7-bit slave address, with 1 indicating read, and 0 indicating write. i 2 c registers the device contains 20 data registers along with an additional pointer register. the pointer register selects which of the other 19 data registers to be read from or written to. at power-up, the pointer is set to read the external temperature register at address 0x00. the pointer register latches the last location to which it was set. p4Cp0 register select a7 a6 a5 a4 a3 a2 a1 a0 1 0 0 1 0 0 0 r-/w p7 p6 p5 p4 p3 p2 p1 p0 0 0 0 register select p4Cp0 (hex) register no. of bits por state 00 external temperature register (read only ) (power-up default) 16 n/a 01 configuration register (read/write) 8 00h 04 internal temperature register (read only ) 16 n/a 05 status register (read only ) 8 n/a 06 product revision register (read only ) 8 00h 07 product id register (read only ) 8 4dh 08 dvr register (r/w) 8 ffh 09 enable register (r/w) 8 00h 0a fault register ( read only ) 8 n/a 0b hvinp register (r/w) 8 0ah 0c programming control register (write only) 8 n/a 0fh temperature conversion rate register 8 04h 10 t1 timing register (r/w) 8 1eh (factory default) 11 t2 timing register (r/w) 8 3ch (factory default) 12 t3timing register (r/w) 8 5ah (factory default) 13 t4 timing register (r/w) 8 78h (factory default) 14 t5 timing register (r/w) 8 1eh (factory default) 15 t6 timing register (r/w) 8 3ch (factory default) 16 t7 timing register (r/w) 8 5ah (factory default) 17 t8 timing register (r/w) 8 78h (factory default)
MAX17135 multi-output dc-dc power supply with vcom amplifier and temperature sensor for e-paper applications 17 configuration register (01h) (r/w) after the in and v dd voltages have risen above their respective undervoltage-lockout thresholds, the shutdown bit (d0) is set to 0 and temperature conver - sions begin immediately. temperature conversions are continually performed every 1s unless the temperature sensor is put into shutdown mode. set d0 to 1 to put the temperature sensor in shutdown mode to reduce supply current. d0: shutdown: when set to 1, the temperature sensor is shut down. status register (05h), read only the status register indicates whether the ics adc is in the process of performing a temperature conversion and whether there are any fault conditions with the remote temperature-sensing diode. any fault condition with the external temperature-sensing diode causes the external temperature register to return 7fc0h. d0: busy: is set to 1 when the adc is in the process of performing a temperature conversion. d1: open: is set to 1 when any connections from dxn and dxp to the temperature-sensing diode are open. d2: short: is set to 1 when there is a short-circuit con - dition between dxp and dxn. external and internal temperature registers (00h and 04h), read only the temperature data format of the external temperature register (00h) and the internal temperature register (04h) are both 9 bits, twos complement, and are read out in word format: an upper byte and a lower byte. bits d15Cd7 contain the temperature data, with the lsb rep - resenting +0.5 n c and the msb representing the sign bit. the last 7 bits of the lower byte, bits d6Cd0, are dont care. x = dont care. x = dont care. d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 sign bit 1 = negative 0 = positive +64 n c +32 n c +16 n c +8 n c +4 n c +2 n c +1 n c +0.5 n c x x x x x x x temperature ( n c) digital output binary hex +125 0111 1101 0xxx xxxx 7d0x +25 0001 1001 0xxx xxxx 190x +0.5 0000 0000 1xxx xxxx 008x 0 0000 0000 0xxx xxxx 000x -0.5 1111 1111 1xxx xxxx ff8x -25 1110 0111 0xxx xxxx e70x d7 d6 d5 d4 d3 d2 d1 d0 0 0 0 0 0 0 0 shutdown d7 d6 d5 d4 d3 d2 d1 d0 0 0 0 0 0 short open busy
MAX17135 multi-output dc-dc power supply with vcom amplifier and temperature sensor for e-paper applications 18 product revision register (06h), read only this register contains the product revision 0x00h. product identification register (07h), read only maxim is indicated by 0x4dh. dvr register (08h) r/w the vcom voltage can be set anywhere between -0.5v and -3.050v with 10mv per lsb by programming the dvr register with a corresponding value as shown in the table below. during power-up, once in and v dd exceed their undervoltage-lockout thresholds, the dvr register is programmed with a value stored in the nonvolatile memory to set the vcom voltage. the factory-default dvr value stored in the nonvolatile memory is 7f. see the programming control register (0ch) , write only sec - tion for details regarding changing the preset dvr value. enable register (09h) r/w the output enable functions performed by the en and cen pins can also be performed through i 2 c commands by setting the functions corresponding enable bit in the enable register. each functions enable bit is ored with the status of its corresponding enable pin to determine whether the func - tion is to be performed. if i 2 c control over the en and cen functions is desired, leave the en and cen pins unconnected or connect them to gnd such that when: ? the en bit is set to 1; the gvee, neg, pos, and gvdd power rails begin a power-up sequence. the sequence order and timing between the startup of each power rail is determined by the information stored in the t1Ct4 timing registers at the time the en bit is set to 1. ? the en bit is set to 0; the gvee, neg, pos, and gvdd begin a power-down/discharge sequence based on the information stored in the timing reg - isters. the sequence order and timing between the power-down of each power rail is determined by the information stored in the t5Ct8 timing registers at the time the en bit is set to 0. ? the cen bit is set to 1; the vcom output is enabled. ? the cen bit is set to 0; the vcom output is dis - charged to ground. during a fault condition, all bits in the enable register are cleared (en = cen = 0). driving the en or cen pins high or low has no effect on the en or cen settings in the enable register. d7 d6 d5 d4 d3 d2 d1 d0 0 0 0 0 0 0 0 0 d7 d6 d5 d4 d3 d2 d1 d0 0 1 0 0 1 1 0 1 d7 d6 d5 d4 d3 d2 d1 d0 0 0 0 0 0 0 cen en d7 d6 d5 d4 d3 d2 d1 d0 msb bit6 bit5 bit4 bit3 bit2 bit1 lsb dvr register vcom output voltage (v) 00h -0.50 01h -0.51 7fh -1.77 feh -3.04 ffh -3.05
MAX17135 multi-output dc-dc power supply with vcom amplifier and temperature sensor for e-paper applications 19 fault register (0ah) read only during a fault condition, all outputs of the device are latched off, all bits in the enable register are set to 0, and the corresponding bit of the fault condition is set in the fault register (see the table below). after the fault condi - tion is removed, the fault register is cleared by cycling the v dd supply. the pok bit in the fault register is not a fault indicator, but rather a status indicator that is asserted to 1 after fbng, neg, pos, and fbpg have all exceeded 80% of their regulation voltages and all soft-start periods have completed. the pok bit is set to 0 once the power-down sequence has been initiated by setting the en bit to 0 or once a fault condition has occurred. the status of pok itself does not directly affect the status of en or cen bits. note: the temperature sensor dxn/dxp short-circuit and open-circuit faults are not latching faults that cause the ic to shut down and do not set the cen or en bits status. fbpg = gvdd undervoltage fault hvinp = hvinp undervoltage fault hvinn = hvinn undervoltage fault fbng = gvee undervoltage fault hvinpsc = hvinn short-circuit fault hvinnsc = hvinn short-circuit fault ot = thermal shutdown pok = power-ok hvinp register (0bh) r/w the pos regulation voltage is determined by the boost converters output regulation voltage (v hvinp ). the hvinp regulation voltage is set by using a resistor-divider network or by programming the corresponding value of the desired hvinp regulation voltage into the hvinp reg - ister through i 2 c (see the table below). programming the hvinp register to set the hvinp regulation voltage gives the flexibility to change the hvinp regulation voltage between each power-up sequence of the gvee, neg, pos, and gvdd rails and removes external components. to set the hvinp regulation voltage through i 2 c, connect the fbp pin to gnd. with fbp connected to gnd, the hvinp register is automatically loaded with 0ah and the hvinp regulation voltage is set to +15v after in and v dd have exceeded their undervoltage-lockout thresholds. if another hvinp regulation voltage other than +15v is desired, write a new value to the hvinp register that cor - responds to the desired hvinp regulation voltage after in and v dd have exceeded their undervoltage-lockout thresholds, but before en is asserted high. the new hvinp regulation voltage is maintained until a new value is written to the hvinp register or the v dd input power is cycled. after cycling v dd , the hvinp register is again reloaded with 0ah such that it is necessary to rewrite the hvinp register to change the hvinp regulation voltage to another voltage other than v hvinp = 15v. the hvinp register can be programmed to provide a pos regulation voltage from 00h (v pos = 5v) to 0ch (v pos = 17v) adjustable in 1v steps. d7 d6 d5 d4 d3 d2 d1 d0 pok ot hvinnsc hvinpsc fbng hvinn hvinp fbpg d7 d6 d5 d4 d3 d2 d1 d0 0 0 0 0 msb bit2 bit1 lsb hvinp register hvinp output voltage (v) 00h 5 01h 6 ... ... 0ah 15 0bh 16 0ch 17
MAX17135 multi-output dc-dc power supply with vcom amplifier and temperature sensor for e-paper applications 20 conversion rate control byte (0fh) r/w the conversion rate register (0fh) programs the time interval between conversions in the free-running auto - convert mode of the temperature sensors. this variable- rate control reduces the supply current in portable- equipment applications. the conversion rate control bytes por state is 04h. the control mechanism looks only at the 3 lsbs of this register, so the upper 5 bits are dont care bits, which should be set to zero. the conversion rate tolerance is 25% at any rate setting. valid a/d conversion results are available one total con - version time after the initiating conversion, whether the conversion is initiated through the shutdown bit in the configuration register or initial power-up. changing the conversion rate can also affect the delay until new results are available. t1Ct8 timing registers (10hC17h) r/w figure 5 shows the start-up and shutdown sequence of the power rails: ? the hvinp power rail begins its soft-start sequence once en is driven high or the en bit in the enable register is set to 1. ? the hvinn power rail begins its soft-start sequence once the hvinp soft-start period has expired. ? the gvee, neg, pos, and gvdd power rails start up t1Ct4ms after the expiration of the hvinn soft-start period. ? pok is asserted high after fbng, neg, pos, and fbpg have all exceeded 80% of their regulation volt - ages and all the corresponding power rails soft-start periods have expired. ? once en is driven low or the en bit in the enable register is set to 0 (while the en is disconnected or is connected to gnd), pok is asserted low and each power rail is discharged at a time depending on the values stored in the timing registers (t5Ct8). approximately 512ms after en is driven low, hvinp and hvinn are powered down but not discharged. the power-up/power-down sequence and timing between the gvee, neg, pos, and gvdd power rails can be set by programming the t1Ct8 registers with cor - responding values according to the table below. the binary value stored in a register directly corresponds to the time in ms. during power-up of the device, once in and v dd exceed their undervoltage-lockout thresholds, the t1Ct8 registers are loaded with values stored in the nonvolatile memory to preset the t1Ct8 timing. the factory-default timing set - tings in the nonvolatile memory are: ? t1 = t5 = 30ms ? t2 = t6 = 60ms ? t3 = t7 = 90ms ? t4 = t8 = 120ms to change the preset t1Ct8 timing, see the programming control register (0ch), write only section. d7 d6 d5 d4 d3 d2 d1 d0 128ms 64ms 32ms 16ms 8ms 4ms 2ms 1ms value stored in a timing register (t1Ct8) time (ms) 00h 0 01h 1 ... ... feh 254 ffh 255 data conversion rate (hz) average supply current of temp- sensor block (a) 00h 0.0625 14 01h 0.125 18 02h 0.25 26 03h 0.5 41 04h 1 72 05h 2 133 06h 4 255 07h 8 500 08h to ffh depends on the 3 lsb depends on the 3 lsb
MAX17135 multi-output dc-dc power supply with vcom amplifier and temperature sensor for e-paper applications 21 figure 5. adjustable power-up and power-down sequencing programming control register (0ch), write only the programming control register (pcr) allows the user to update the nonvolatile memory containing the values used to set the dvr and timing registers after initial power-up of the ic (after v dd and in both exceed their undervoltage-lockout thresholds). to change the nonvolatile memory values that preset the vcom voltage, set en to high to bring up the power rails. after pok is asserted high, write the value correspond - ing to the desired vcom voltage setting into the dvr register. after the dvr register has been updated, write 1 to d0 of the pcr to update the nonvolatile memory with the current value stored in the dvr register. the nonvolatile memory containing the power-up dvr set - ting can be changed up to 30 times. the i 2 c bus returns nack if the dvr nonvolatile memory is attempted to be programmed more than 30 times. to change the nonvolatile memory values that preset the power-up and power-down timing between the power rails, set en to high to bring up the power rails. after pok is asserted high, write to all t1Ct8 registers with the val - ues corresponding to the desired t1Ct8 timing between power rails. the t1Ct8 values cannot be stored to the nonvolatile memory independently and all eight timing registers must be written to at least once before attempt - ing to update the nonvolatile memory with any new val - ues, even if not all values need to be changed from the current values stored in the nonvolatile memory. once all the timing registers have been written to at least once, write 1 to d1 of the pcr to update the nonvolatile memory with the current values stored in all t1Ct8 timing registers. the nonvolatile memory containing the power- up and power-down timing settings can be changed up to three times. the i 2 c bus returns nack if the t1Ct8 nonvolatile memory is attempted to be programmed more than three times. note: v pos needs to be greater than 7.3v in order to successfully program the nonvolatile memory. hvinp 2 1 3 4 5 gvdd pos pok neg gvee en hvinn t1 t5 t6 t7 t8 t2 t3 t4 512ms d7 d6 d5 d4 d3 d2 d1 d0 0 0 0 0 0 0 timing dvr
MAX17135 multi-output dc-dc power supply with vcom amplifier and temperature sensor for e-paper applications 22 pcb layout and grounding careful pcb layout is important for proper operation. use the following guidelines for good pcb layout: ? minimize the inner loop area created by the boost converter high-switching current connections. place d1 and c3 close to the ic such that the traces con - necting the lxp pin to the anode of d1, the cathode of d1 to c3, and c3 to the pgnd pin are kept as short as possible to minimize the loop area contained within these connections. make these connections with short, wide traces. ? minimize the inner loop area created by the buck- boost converter high-switching current connections. place c6, c7, and d2 close to the ic such that the traces connecting c6 to the inn pin, the lxn pin to the cathode of d2, the anode of d2 to c7, and c6 ground connection to c7 are kept as short as pos - sible to minimize the loop area contained within these connections. make these connections with short, wide traces. ? avoid using vias in the high-current paths. if vias are unavoidable, use many vias in parallel to reduce resistance and inductance. ? create a power ground island (pgnd) consisting of the pgnd pin, the input and output capacitor ground connections, the charge-pump capacitor ground con - nections, and the buck-boost inductor ground connec - tion. connect all these together with short, wide traces or a small ground plane. maximizing the width of the power ground traces improves efficiency and reduces output-voltage ripple and noise spikes. create an ana - log ground plane (gnd) consisting of the gnd pin, all the feedback-divider ground connections, the in, v dd , and ref bypass capacitor ground connections, and the devices exposed backside paddle. ? connect the gnd and pgnd islands by connect - ing the pgnd pin directly to the exposed backside paddle. make no other connections between these separate ground planes. ? place the feedback-voltage-divider resistors as close as possible to their respective feedback pins. keep the traces connecting the feedback resistors to their respective feedback pins as short as possible. placing the resistors far away causes the feedback trace to become an antenna that can pick up switch - ing noise. care should be taken to avoid running any feedback trace near the lxp, lxn, dp, or dn switch - ing nodes. ? place the in, v dd , and ref bypass capacitors as close as possible to the ic. the ground connections of the in, v dd , and ref bypass capacitors should be connected directly to the analog ground plane or directly to the gnd pin with a wide trace. ? minimize the length and maximize the width of the traces between the output capacitors and the load for best transient responses. ? keep sensitive signals away from the lxp, lxn, dp, and dn switching nodes. use dc traces as a shield if necessary. refer to the MAX17135 evaluation kit for an example of proper board layout. chip information process: bicmos package information for the latest package outline information and land pat terns (footprints), go to www.maxim-ic.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suf fix character, but the drawing pertains to the package regardless of rohs status. package type package code outline no. land pattern no. 32 tqfn-ep t3255n+1 21-0140 90-0015
MAX17135 multi-output dc-dc power supply with vcom amplifier and temperature sensor for e-paper applications maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 23 ? 2011 maxim integrated products maxim is a registered trademark of maxim integrated products, inc. revision history revision number revision date description pages changed 0 7/11 initial release 1 12/11 typical operating circuit values updated 12

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